Various disclosed implementations relate generally to executing processor instructions, and particular implementations relate more specifically to handling events that occur during the processing of an instruction that is to be performed on multiple sets of data. An instruction may be performed on multiple sets of data in, for example, a multimedia application.
Single Instruction/Multiple Data (“SIMD”) technology allows a single instruction to be performed on multiple sets of data. The instruction can be performed on the multiple sets of data in parallel, thus reducing total execution time compared to performing the instruction serially on each of the sets of data. SIMD instructions are often used with systems that provide packed data formats that allow, for example, a register to be logically divided into multiple data fields. For example, a 128-bit register A can be logically divided into four 32-bit registers A1, A2, A3, and A4. Assuming there are two such registers, A and B, a SIMD add instruction using these registers, for example, ADD A, B, specifies that an add operation is to be performed on each of the four sets of logical registers contained in registers A and B. The four add operations are A1+B1, A2+B2, A3+B3, and A4+B4.
Streaming SIMD Extensions (“SSE”) and SSE2 are two examples of SIMD instruction sets. When these or other SIMD instructions are processed, various events may occur that interrupt the execution of the instruction and need to be handled.